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2017

BibTeX Search WWW PDF   [Basa17]
S.R. Basavaraju
Application-specific Configuration of Exposed Datapath Architectures
Master Thesis
BibTeX Search WWW PDF   [BhSc17]
A. Bhagyanath and K. Schneider
Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [BhSc17a]
A. Bhagyanath and K. Schneider
Exploring Different Execution Paradigms in Exposed Datapath Architectures with Buffered Processing Units
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)
BibTeX Search WWW PDF   [BhSc17b]
A. Bhagyanath and K. Schneider
Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units
Presentation
BibTeX Search WWW PDF   [DJSG17]
M. Dahlem and T. Jain and K. Schneider and M. Gillmann
Automatic Synthesis of Optimal-Size Concentrators by Answer Set Programming
Logic Programming and Nonmonotonic Reasoning (LPNMR)
BibTeX Search WWW PDF   [Haif17]
F. Haifani
Antichain Optimization using Simulation Relations for Context-Free Games
Master Thesis
BibTeX Search WWW PDF   [JaSJ17]
T. Jain and K. Schneider and A. Jain
An Efficient Self-Routing and Non-Blocking Interconnection Network on Chip
Network on Chip Architectures (NoCArc)
BibTeX Search WWW PDF   [JaSW17]
T. Jain and K. Schneider and F. Walk
Out-of-Order Execution of Buffered Function Units in Exposed Data Path Architectures
Reconfigurable Architectures Workshop (RAW)
BibTeX Search WWW PDF   [LeSc17]
A. Legay and K. Schneider
Message from the ACSD 2017 Program Chairs
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [ScBr17]
K. Schneider and J. Brandt
Quartz: A Synchronous Language for Codesign
BibTeX Search WWW PDF   [Stat17]
M. Stather
Entwicklung einer Kommunikationskomponente mit Sensor-/Aktorinterface auf einem FPGA für das Finroc-Projekt
Bachelor Thesis
BibTeX Search WWW PDF   [Stut17]
F.M. Stutz
Operations on a Symbolic Domain for Synthesis
Bachelor Thesis
BibTeX Search WWW PDF   [TaDS17]
J.-P. Talpin and P. Derler and K. Schneider
Message from the Chairs
Formal Methods and Models for Codesign (MEMOCODE)

2016

BibTeX Search WWW PDF   [Bai16]
Y. Bai
Model-based Design of Embedded Systems by Desynchronization
PhD Thesis
BibTeX Search WWW PDF   [BhJS16]
A. Bhagyanath and T. Jain and K. Schneider
Towards Code Generation for the Synchronous Control Asynchronous Dataflow (SCAD) Architectures
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BhJS16a]
A. Bhagyanath and T. Jain and K. Schneider
Towards Code Generation for the Synchronous Control Asynchronous Dataflow (SCAD) Architectures
Presentation
BibTeX Search WWW PDF   [BhSc16]
A. Bhagyanath and K. Schneider
Optimal Compilation for Exposed Datapath Architectures with Buffered Processing Units by SAT Solvers
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [BhSc16a]
A. Bhagyanath and K. Schneider
Optimal Compilation for Exposed Datapath Architectures with Buffered Processing Units by SAT Solvers
Presentation
BibTeX Search WWW PDF   [Buss16]
L. Busser
Inference of regular expressions/grammars for given data entities
BibTeX Search WWW PDF   [Dein16]
D. Deiniger
Application of Factored Representations from Probabilistic Graphical Models to Probabilistic Verification
Master Thesis
BibTeX Search WWW PDF   [Desh16]
P.D. Deshmukh
Evaluation and comparison of inter-processor communication techniques in model-based design flows/tools
BibTeX Search WWW PDF   [Geor16]
G. Georgopoulos
Memory Consistency Models of Modern CPUs
BibTeX Search WWW PDF   [Harm16]
C. Harms
Evaluation of FPGA-based Implementations of Interconnection Networks
Master Thesis
BibTeX Search WWW PDF   [Heer16]
M. Heer
Verification Condition Generation for Hybrid Systems described by Synchronous Languages
Master Thesis
BibTeX Search WWW PDF   [Herr16]
F. Herrmann
State of the Art in Temporal Logic Verification
BibTeX Search WWW PDF   [Huse16]
J. Husemann
A Study of Queue Machines
BibTeX Search WWW PDF   [JaSB16]
T. Jain and K. Schneider and A. Bhagyanath
The Selector-Tree Network: A New Self-Routing and Nonblocking Interconnection Network
International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)
BibTeX Search WWW PDF   [JaSB16a]
T. Jain and K. Schneider and A. Bhagyanath
The Selector-Tree Network: A New Self-Routing and Nonblocking Interconnection Network
Presentation
BibTeX Search WWW PDF   [JaSc16]
T. Jain and K. Schneider
Verifying the Concentration Property of Permutation Networks by BDDs
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [JaSc16a]
T. Jain and K. Schneider
Verifying the Concentration Property of Permutation Networks by BDDs
Presentation
BibTeX Search WWW PDF   [John16]
M.R. John
Static Instruction Scheduling for Transport Triggered Architectures
Master Thesis
BibTeX Search WWW PDF   [Kabo16]
A. Kabouteh
Formal Method Based Analysis of an Ophthalmic Surgical Robot Considering Hard Real-Time Constraints
Master Thesis
BibTeX Search WWW PDF   [Kann16]
S. Kannoth
A Survey of Real-Time Interconnects
BibTeX Search WWW PDF   [Krem16]
M. Kremer
Worst Case Reaction Time (WCRT) Analysis Techniques for Synchronous Programs
BibTeX Search WWW PDF   [LiSc16a]
X. Li and K. Schneider
Control-flow Guided Clause Generation for Property Directed Reachability
High-Level Design Validation and Test Workshop (HLDVT)
BibTeX Search WWW PDF   [LiSc16b]
X. Li and K. Schneider
Control-flow Guided Clause Generation for Property Directed Reachability
Presentation
BibTeX Search WWW PDF   [LiSc16c]
X. Li and K. Schneider
Control-flow Guided Property Directed Reachability for Synchronous Programs
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [LiSc16d]
X. Li and K. Schneider
Control-flow Guided Property Directed Reachability for Synchronous Programs
Presentation
BibTeX Search WWW PDF   [Pand16]
G. Pandit
Compilation Techniques for Reactive Systems
BibTeX Search WWW PDF   [RBLS16]
T. Ropertz and K. Berns and X. Li and K. Schneider
Verification of Behavior-Based Control Systems in their Physical Environment
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [RBLS16a]
T. Ropertz and K. Berns and X. Li and K. Schneider
Verification of Behavior-Based Control Systems in their Physical Environment
Presentation
BibTeX Search WWW PDF   [RaSc16]
O. Rafique and K. Schneider
Introducing MoC Drivers for the Integration of Sensor-Actuator Behaviors in Model-Based Design Flows of Embedded Systems
International Workshop on Software and Compilers for Embedded Systems (SCOPES)
BibTeX Search WWW PDF   [RaSc16a]
O. Rafique and K. Schneider
Towards the Standardization of Plug-and-Play Devices for Model-Based Designs of Embedded Systems
Symposium on Industrial Embedded Systems (SIES)
BibTeX Search WWW PDF   [RaSc16b]
O. Rafique and K. Schneider
Introducing MoC Drivers for the Integration of Sensor-Actuator Behaviors in Model-Based Design Flows of Embedded Systems
Presentation
BibTeX Search WWW PDF   [Rao16]
A. Rao
Implementation of a Software Emulator to recreate I2C Sensor Communication
Master Thesis
BibTeX Search WWW PDF   [Schu16]
S. Schumb
A Survey of Reactive Processor Architectures
BibTeX Search WWW PDF   [SeSc16]
M. Senftleben and K. Schneider
Specifying Weak Memory Consistency with Temporal Logic
Verification and Evaluation of Computer and Communication Systems (VECoS)
BibTeX Search WWW PDF   [TaLS16]
J.P. Talpin and E. Leonard and K. Schneider
Welcome Message from the Chairs
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Walk16a]
F. Walk
Out-of-Order Execution Within Functional Units of the SCAD Architecture
Master Thesis

2015

BibTeX Search WWW PDF   [Ashr15]
K. Ashraf
HW/SW Co-design and Implementation of a Fountain Code for an FPGA System-on-Chip
Master Thesis
BibTeX Search WWW PDF   [BaSc15]
D. Baudisch and K. Schneider
Evaluation of Speculation in Out-Of-Order Execution of Synchronous Data-Flow Networks
International Journal of Parallel Programming (IJPP)
BibTeX Search WWW PDF   [Basa15]
S.R. Basavaraju
WCET-centric Scratchpad Memory Allocation
BibTeX Search WWW PDF   [Basa15a]
S.R. Basavaraju
WCET-centric Scratchpad Memory Allocation
Presentation
BibTeX Search WWW PDF   [Betz15]
A. Betz
x86 Memory Consistency
BibTeX Search WWW PDF   [BhJS15]
A. Bhagyanath and T. Jain and K. Schneider
A Time-Predictable Model of Computation
Real-Time Systems Symposium (RTSS)
BibTeX Search WWW PDF   [BhSS15]
N. Bhardwaj and M. Senftleben and K. Schneider
Abacus – A Processor Family for Education
Workshop on Embedded and Cyber-Physical Systems Education (WESE'14)
BibTeX Search WWW PDF   [Bich15]
F. Bichued
Verification of Microprocessors
Master Thesis
BibTeX Search WWW PDF   [Blat15]
D. Blatner
Automatisierte Transformationen von Petri-Netzen zur detaillierten Ablaufkontrolle in verteilten Laufzeitsystemen
Master Thesis
BibTeX Search WWW PDF   [Eswa15]
A. Eswarappa
AUTOSAR
BibTeX Search WWW PDF   [FMSS15]
F. Furbach and R. Meyer and K. Schneider and M. Senftleben
Memory-Model-aware Testing -- A Unified Complexity Analysis
Transactions on Embedded Computing Systems (TECS)
BibTeX Search WWW PDF   [Faus15]
M. Faust
Dataflow processor architecture implementation survey
BibTeX Search WWW PDF   [Faus15a]
M. Faust
Dataflow processor architecture implementation survey
Presentation
BibTeX Search WWW PDF   [Froe15]
J. Frömmer
Hoare Calculi for Parallel Programs
BibTeX Search WWW   [Garc15]
H. Lázaro García
Using UVM for Mixed-Signal Verification with IGBT Driver Context
Master Thesis
BibTeX Search WWW PDF   [Grei15]
T. Greiner
The use of weak consistency models in cloud storage
BibTeX Search WWW PDF   [Harm15]
C. Harms
Branch Prediction in WCET Analysis
BibTeX Search WWW PDF   [Harm15a]
C. Harms
Branch Prediction in WCET Analysis
Presentation
BibTeX Search WWW PDF   [Jede15]
E. Jedermann
Exposed Datapath Processor Architecture Implementation Survey
BibTeX Search WWW PDF   [Jede15a]
E. Jedermann
Exposed Datapath Processor Architecture Implementation Survey
Presentation
BibTeX Search WWW PDF   [Klip15]
N. Klipphahn
Concurrent Model Checking -- Systematic testing/Stateless Model Checking
BibTeX Search WWW PDF   [Kolh15]
A. Kolhapurkar
Functional Safety: ISO26262
BibTeX Search WWW PDF   [Lang15]
D. Langguth
Scratchpad memory vs Caches -- Performance and Predictability Comparison
BibTeX Search WWW PDF   [Lang15a]
D. Langguth
Scratchpad memory vs Caches -- Performance and Predictability Comparison
Presentation
BibTeX Search WWW PDF   [LiSc15]
X. Li and K. Schneider
A Counterexample-Guided Approach to Symbolic Simulation of Hybrid Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [LiSc15a]
X. Li and K. Schneider
An SMT-based Approach to analyze Non-Linear Relations of Parameters for Hybrid Systems
SyDe Summer School
BibTeX Search WWW PDF   [LiSc15b]
X. Li and K. Schneider
Verification Condition Generation for Hybrid Systems
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Nogu15]
C. Pereira Nogueira
Caches in Worst Case Execution Time (WCET) Analysis
BibTeX Search WWW PDF   [Nogu15a]
C. Pereira Nogueira
Caches in Worst Case Execution Time (WCET) Analysis
Presentation
BibTeX Search WWW PDF   [Pahl15]
P. Pahlevannejad
Speculative Relaxation of Memory Consistency
BibTeX Search WWW PDF   [Pahl15a]
P. Pahlevannejad
Speculative Relaxation of Memory Consistency
Presentation
BibTeX Search WWW PDF   [RoSF15]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Semantics in space systems architectures
Innovations in Systems and Software Engineering -- A NASA Journal
BibTeX Search WWW PDF   [Schu15]
S. Schumb
Hardware Generation for Transport Triggered Architectures
Bachelor Thesis
BibTeX Search WWW PDF   [Shaz15]
T. Shazadi
Evaluation of Dataflow Process Networks Mapping on Multi-core Processors
Master Thesis
BibTeX Search WWW PDF   [Stra15]
J. Stratmann
Implementation and Verification of IEEE-conform Floating-Point Arithmetic
Master Thesis
BibTeX Search WWW PDF   [Tria15]
A. Triambak
Dynamic Scheduling of Instructions in Transport Triggered Architecture based Processors
Master Thesis
BibTeX Search WWW PDF   [Zhan15]
H. Zhang
E-Gas Überwachungskonzept

2014

BibTeX Search WWW PDF   [Adam14]
J. Adamczyk
Automotive Application: Engine Control
BibTeX Search WWW PDF   [BSBK14]
Y. Bai and K. Schneider and N. Bhardwaj and B. Katti and T. Shazadi
From Clock-Driven to Data-Driven Models
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [BSBK14a]
Y. Bai and K. Schneider and N. Bhardwaj and B. Katti and T. Shazadi
From Clock-Driven to Data-Driven Models
Presentation
BibTeX Search WWW PDF   [BSBK14b]
Y. Bai and K. Schneider and N. Bhardwaj and B. Katti and T. Shazadi
From Clock-Driven to Data-Driven Models
Presentation
BibTeX Search WWW PDF   [BaBS14]
D. Baudisch and Y. Bai and K. Schneider
Reducing the Communication of Message-Passing Systems Synthesized from Synchronous Programs
Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)
BibTeX Search WWW PDF   [BaSc14]
Y. Bai and K. Schneider
Isochronous Networks by Construction
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [BhSS14a]
N. Bhardwaj and M. Senftleben and K. Schneider
Abacus – A Processor Family for Education
Presentation
BibTeX Search WWW PDF   [BhSc14]
A. Bhagyanath and K. Schneider
TTA as Predictable Architecture for Real-Time Applications
International Conference on Science, Engineering, Research and Management (ICSEMR)
BibTeX Search WWW PDF   [Bill14]
J. Billert
Automotive Operating Systems: OSEK/VDX
BibTeX Search WWW PDF   [BrSB14]
J. Brandt and K. Schneider and Y. Bai
Passive Code in Synchronous Programs
Transactions on Embedded Computing Systems (TECS)
BibTeX Search WWW PDF   [Dahl14]
M. Dahlem
Interactive Verification of Synchronous Systems in HOL
Master Thesis
BibTeX Search WWW PDF   [EdGS14]
S.A. Edwards and A. Girault and K. Schneider
Synchronous Programming (SYNCHRON 2013; Dagstuhl Seminar 13471)
Dagstuhl Reports
BibTeX Search WWW PDF   [Espe14]
D. Espen
Adaptive Cruise Control
BibTeX Search WWW PDF   [FMSS14]
F. Furbach and R. Meyer and K. Schneider and M. Senftleben
Memory Model-Aware Testing - A Unified Complexity Analysis
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [FMSS14a]
F. Furbach and R. Meyer and K. Schneider and M. Senftleben
Memory Model-aware Testing -- A Unified Complexity Analysis
Presentation
BibTeX Search WWW PDF   [GeBS14]
M. Gesell and F. Bichued and K. Schneider
Using Different Representations of Synchronous Systems in SAL
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [Gese14]
M. Gesell
Interactive Verification of Synchronous Systems
PhD Thesis
BibTeX Search WWW PDF   [Heer14]
M. Heer
Assembler Code-Generierung aus synchronen Aktionen
Bachelor Thesis
BibTeX Search WWW PDF   [Heil14]
P. Heiler
CAN -- Controller Area Network
BibTeX Search WWW PDF   [Hubr14]
J. Hubrich
Fahrdynamikregelung
BibTeX Search WWW PDF   [Kaes14]
M. Kaesberger
Fahrzeugdiagnose
BibTeX Search WWW PDF   [KhBS14]
M. Ammar Ben Khadra and Y. Bai and K. Schneider
Synthesis of Distributed Synchronous Specifications to SysteMoC
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [KhBS14a]
M.A. Ben Khadra and Y. Bai and K. Schneider
High Level Modeling of Elastic Circuits in SystemC
Symposium on Theory of Modeling and Simulation (TMS/DEVS)
BibTeX Search WWW PDF   [KhBS14b]
M.A. Ben Khadra and Y. Bai and K. Schneider
Synthesis of Distributed Synchronous Specifications to SysteMoC
Presentation
BibTeX Search WWW PDF   [Kimp14]
M. Kimpel
Automotive Software Modules and Interfaces: ASAM MDX
BibTeX Search WWW PDF   [Knob14]
J.B. Knobloch
LIN-Bus
BibTeX Search WWW PDF   [LiSc14]
X. Li and K. Schneider
Interactive Verification of Hybrid Systems
Automated Verification of Critical Systems (AVoCS)
BibTeX Search WWW PDF   [LiSc14b]
X. Li and K. Schneider
Interactive Verification of Hybrid Systems
Presentation
BibTeX Search WWW PDF   [Maca14]
M.N. Basurto Macavilca
Endochrony of Distributed Systems
Diploma Thesis
BibTeX Search WWW PDF   [RSFB14]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira and Y. Bai
Using the Base Semantics given by fUML for Verification
Presentation
BibTeX Search WWW PDF   [Rede14]
M. Reder
Code Generation for Transport Triggered Architecture
Bachelor Thesis
BibTeX Search WWW PDF   [RoSF14]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Integrating UML Composite Structures and fUML
International Conference on Current Trends in Theory and Practice of Computer Science (SOFSEM)
BibTeX Search WWW PDF   [RoSF14a]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Using the Base Semantics given by fUML for Verification
International Conference on Model-Driven Engineering and Software Development (MODELSWARD)
BibTeX Search WWW PDF   [RoSF14b]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Integrating UML Composite Structures and fUML
Presentation
BibTeX Search WWW PDF   [Rome14]
A. Gerlinger Romero
Hybrid fUML: A Hybrid Synchronous Language
PhD Thesis
BibTeX Search WWW PDF   [Roob14]
J. Roob
A Hardware Abstraction Layer for Model-based Design of Embedded Systems
Bachelor Thesis
BibTeX Search WWW   [SCSO14]
K. Schneider and N. Chang and Y. Shin and S. Ozev
International Conference on Computer Design (ICCD)
BibTeX Search WWW PDF   [ScWi14]
K. Schneider and A. Willenbücher
A New Algorithm for Carry-Free Addition of Binary Signed-Digit Numbers
Field-Programmable Custom Computing Machines (FCCM)
BibTeX Search WWW PDF   [ScWi14a]
K. Schneider and A. Willenbücher
A New Algorithm for Carry-Free Addition of Binary Signed-Digit Numbers
Presentation
BibTeX Search WWW PDF   [Schm14b]
F. Schmidt
Automotive Communication Architectures: MOST
BibTeX Search WWW PDF   [Schn14]
F. Schnicke
ASCET-MD
BibTeX Search WWW PDF   [TBGS14]
J.-P. Talpin and J. Brandt and M. Gemünde and K. Schneider and S. Shukla
Constructive Polychronous Systems
Science of Computer Programming (SCICO)
BibTeX Search WWW PDF   [Thie14]
D. Thielsch
Analysis of Concurrency in Synchronous Systems
Master Thesis
BibTeX Search WWW PDF   [Tria14]
A. Triambak
Timing Anomalies and WCET Analysis

2013

BibTeX Search WWW PDF   [BGSS13]
J. Brandt and M. Gemünde and K. Schneider and S.K. Shukla and J.-P. Talpin
Embedding Polychrony into Synchrony
IEEE Transactions on Software Engineering (TSE)
BibTeX Search WWW PDF   [BSCO13]
G. Byrd and K. Schneider and N. Chang and S. Ozev
International Conference on Computer Design (ICCD)
BibTeX Search WWW PDF   [Baud13]
D. Baudisch
Synthesis of Synchronous Programs to Parallel Software Architectures
PhD Thesis
BibTeX Search WWW PDF   [Bich13]
F. Bichued
Cyber Physical System Verification with SAL
BibTeX Search WWW PDF   [Bich13a]
F. Bichued
Cyber Physical System Verification with SAL
Presentation
BibTeX Search WWW PDF   [Bran13]
J. Brandt
Synchronous Models for Embedded Software
Habilitation Thesis
BibTeX Search WWW PDF   [Ciol13]
G.A. Ciolacu
Introducing Simulation of Hybrid Systems with the Modelica Tool
BibTeX Search WWW PDF   [Ciol13a]
G.A. Ciolacu
Introducing Simulation of Hybrid Systems with the Modelica Tool
Presentation
BibTeX Search WWW PDF   [GeBS13]
M. Gemünde and J. Brandt and K. Schneider
Clock Refinement in Imperative Synchronous Languages
EURASIP Journal on Embedded Systems
BibTeX Search WWW PDF   [GeMS13]
M. Gesell and A. Morgenstern and K. Schneider
Lifting Verification Results for Preemption Statements
Software Engineering and Formal Methods (SEFM)
BibTeX Search WWW PDF   [GeMS13a]
M. Gesell and A. Morgenstern and K. Schneider
Lifting Verification Results for Preemption Statements
Presentation
BibTeX Search WWW PDF   [GeSc13]
M. Gesell and K. Schneider
An Interactive Verification Tool for Synchronous/Reactive Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [GeSc13a]
M. Gesell and K. Schneider
Modular Verification of Synchronous Programs
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [GeSc13b]
M. Gesell and K. Schneider
Modular Verification of Synchronous Programs
Presentation
BibTeX Search WWW PDF   [GeSc13c]
M. Gesell and K. Schneider
Translating synchronous guarded actions to interleaved guarded actions
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [GeSc13d]
M. Gesell and K. Schneider
Translating Synchronous Guarded Actions to Interleaved Guarded Actions
Presentation
BibTeX Search WWW PDF   [Gemu13a]
M. Gemünde
Clock Refinement in Imperative Synchronous Programs
PhD Thesis
BibTeX Search WWW PDF   [Humb13]
Y. Humbert
Umsetzung und Vergleich der Ausführung einer rechenintensiven Echtzeitanwendung mittels OpenMP und CUDA am Beispiel des Beamforming-Algorithmus
Master Thesis
BibTeX Search WWW PDF   [Khad13]
M.A. Ben Khadra
A Model-based Approach To Sychronous Elastic Systems
Master Thesis
BibTeX Search WWW PDF   [LiBS13]
X. Li and K. Bauer and K. Schneider
Interactive Verification of Cyber-physical Systems: Interfacing Averest and KeYmaera
International Workshop on Cyber-Physical Systems (IWCPS)
BibTeX Search WWW PDF   [LiBS13a]
X. Li and K. Bauer and K. Schneider
Interactive Verification of Cyber-physical Systems Interfacing Averest and KeYmaera
Presentation
BibTeX Search WWW PDF   [MSLG13]
A. Morgenstern and K. Schneider and S. Lamberti and M. Gesell
From LTL to Symbolically Represented Deterministic Automata
Presentation
BibTeX Search WWW PDF   [MoGS13]
A. Morgenstern and M. Gesell and K. Schneider
Solving Games Using Incremental Induction
Integrated Formal Methods (IFM)
BibTeX Search WWW PDF   [MoGS13a]
A. Morgenstern and M. Gesell and K. Schneider
Solving Games Using Incremental Induction
Presentation
BibTeX Search WWW PDF   [RaGS13]
O. Rafique and M. Gesell and K. Schneider
Generating hardware specific code at different abstraction levels using Averest
International Workshop on Software and Compilers for Embedded Systems (SCOPES)
BibTeX Search WWW PDF   [RaGS13a]
O. Rafique and M. Gesell and K. Schneider
Targeting Different Abstraction Layers by Model-Based Design Methods for Embedded Systems: A Case Study
Real-Time Computing Systems and Applications (RTCSA)
BibTeX Search WWW PDF   [RaGS13b]
O. Rafique and M. Gesell and K. Schneider
Generating Hardware-Specific Code at Different Abstraction Levels using Averest
Presentation
BibTeX Search WWW PDF   [RaGS13c]
O. Rafique and M. Gesell and K. Schneider
Learning Various Aspects of a Distributed Real-Time Automotive Embedded System
Workshop on Embedded and Cyber-Physical Systems Education (WESE)
BibTeX Search WWW PDF   [Rafi13]
O. Rafique
Design, Development, and Integration of a Wireless Communication Unit in ConceptCar
Master Thesis
BibTeX Search WWW PDF   [RoSF13]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Synchronous Specialization of Alf for Cyber-Physical Systems
First Open EIT ICT Labs Workshop on Cyber-Physical Systems Engineering
BibTeX Search WWW PDF   [RoSF13a]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Towards the Applicability of Alf to Model Cyber-Physical Systems
International Workshop on Cyber-Physical Systems (IWCPS)
BibTeX Search WWW PDF   [RoSF13b]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Synchronous Specialization of Alf for Cyber-Physical Systems
Presentation
BibTeX Search WWW PDF   [RoSF13c]
A. Gerlinger Romero and K. Schneider and M. Gonçalves Vieira Ferreira
Towards the Applicability of Alf to Model Cyber-Physical Systems
Presentation
BibTeX Search WWW PDF   [Schu13c]
S. Schumb
Cyber Physical System Verification Seminar: Event-B
BibTeX Search WWW PDF   [Schu13d]
S. Schumb
Cyber Physical System Verification Seminar: Event-B
Presentation
BibTeX Search WWW PDF   [Senf13]
M. Senftleben
Operational Characterization of Weak Memory Consistency Models
Master Thesis
BibTeX Search WWW PDF   [TBGS13]
J.-P. Talpin and J. Brandt and M. Gemünde and K. Schneider and S. Shukla
Constructive Polychronous Systems
Logical Foundations of Computer Science (LFCS)
BibTeX Search WWW PDF   [Walk13]
F. Walk
Parallel Software Generated from Synchronous Programs -- A Performance Evaluation Using a Ray Tracer
Bachelor Thesis
BibTeX Search WWW PDF   [WiSc13]
A. Willenbücher and K. Schneider
Automatic Hard Block Inference on FPGAs
Euromicro Conference on Digital System Design
BibTeX Search WWW PDF   [WiSc13a]
A. Willenbücher and K. Schneider
Automatic Hard Block Inference on FPGAs
Presentation

2012

BibTeX Search WWW PDF   [BGSS12]
J. Brandt and M. Gemünde and K. Schneider and S.K. Shukla and J.-P. Talpin
Representation of Synchronous, Asynchronous, and Polychronous Components by Clocked Guarded Actions
Design Automation for Embedded Systems (DAEM)
BibTeX Search WWW PDF   [BaBS12]
D. Baudisch and J. Brandt and K. Schneider
Out-Of-Order Execution of Synchronous Data-Flow Networks
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (ICSAMOS)
BibTeX Search WWW PDF   [BaBS12a]
D. Baudisch and J. Brandt and K. Schneider
Efficient Handling of Arrays in Dataflow Process Networks
International Conference on Embedded Software and Systems (ICESS)
BibTeX Search WWW PDF   [BaBS12b]
Y. Bai and J. Brandt and K. Schneider
Preservation of LTL Properties in Desynchronized Systems
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [BaBS12c]
Y. Bai and J. Brandt and K. Schneider
Monitoring Distributed Reactive Systems
High Level Design Validation and Test Workshop (HLDVT)
BibTeX Search WWW PDF   [BaBS12d]
D. Baudisch and J. Brandt and K. Schneider
Out-Of-Order Execution of Synchronous Data-Flow Networks
Presentation
BibTeX Search WWW PDF   [BaBS12e]
D. Baudisch and J. Brandt and K. Schneider
Efficient Handling of Arrays in Dataflow Process Networks
Presentation
BibTeX Search WWW PDF   [BaSc12a]
K. Bauer and K. Schneider
Teaching Cyber-Physical Systems: A Programming Approach
Workshop on Embedded and Cyber-Physical Systems Education (WESE)
BibTeX Search WWW PDF   [BaSc12b]
D. Baudisch and K. Schneider
GPGPU Architectures -- Compiler Techniques and Applications
BibTeX Search WWW PDF   [Baue12]
K. Bauer
A New Modelling Language for Cyber-physical Systems
PhD Thesis
BibTeX Search WWW PDF   [Blat12]
D. Blatner
OpenACC and the PGI Compiler
BibTeX Search WWW PDF   [Blat12a]
D. Blatner
OpenACC and the PGI Compiler
Presentation
BibTeX Search WWW PDF   [BrSE12]
J. Brandt and K. Schneider and S.A. Edwards
Translating SHIM to Guarded Actions
Technical Report
BibTeX Search WWW   [BrSc12]
J. Brandt and K. Schneider
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [Eick12]
T. Eickhoff
Program Sketching Using Craig Interpolants
Bachelor Thesis
BibTeX Search WWW PDF   [GeSc12]
M. Gesell and K. Schneider
A Hoare calculus for the verification of synchronous languages
Programming Languages meets Program Verification (PLPV)
BibTeX Search WWW PDF   [GeSc12a]
M. Gesell and K. Schneider
Interactive Verification of Synchronous Systems
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Grae12a]
M. Gräfe
GPU Architektur und Programmiermö̈glichkeiten fü̈r GPGPU-Anwendungen
Presentation
BibTeX Search WWW PDF   [Grae12b]
M. Gräfe
GPU Architektur und Programmiermö̈glichkeiten fü̈r GPGPU-Anwendungen
BibTeX Search WWW PDF   [Humb12]
Y. Humbert
Simulation digitaler Schaltungen auf GPUs
BibTeX Search WWW PDF   [Humb12a]
Y. Humbert
Simulation digitaler Schaltungen auf GPUs
Presentation
BibTeX Search WWW PDF   [Koel12]
J. Kölsch
Automatische C-to-CUDA Code Generierung
BibTeX Search WWW PDF   [Koel12a]
J. Kölsch
Automatische C-to-CUDA Code Generierung
Presentation
BibTeX Search WWW PDF   [Liet12]
B. Lietzow
A Domain Specific Language for the Synthesis of Networked Embedded Systems
Master Thesis
BibTeX Search WWW PDF   [MoGS12]
A. Morgenstern and M. Gesell and K. Schneider
An Asymptotically Correct Finite Path Semantics for LTL
Logic for Programming, Artificial Intelligence, and Reasoning (LPAR)
BibTeX Search WWW PDF   [Ratz12]
A. Ratzke
An introduction to the research on Scratchpad memory with focus on performance improvement -- Instruction SPM, SPM on Multicoresystems and SPM on Multitaskingsystems
BibTeX Search WWW PDF   [Ratz12a]
A. Ratzke
An introduction to the research on Scratchpad memory with focus on performance improvement -- Instruction SPM, SPM on Multicoresystems and SPM on Multitaskingsystems
Presentation
BibTeX Search WWW PDF   [Roob12]
J. Roob
An Introduction to the Research on Scratchpad Memory: Definition, Hardware, Known Implementations and WCET Optimisation
BibTeX Search WWW PDF   [Roob12a]
J. Roob
An Introduction to the Research on Scratchpad Memory: Definition, Hardware, Known Implementations and WCET Optimisation
Presentation
BibTeX Search WWW PDF   [Senf12]
M. Senftleben
Dataflow Programming on GPUs
BibTeX Search WWW PDF   [Senf12a]
M. Senftleben
Dataflow Programming on GPUs
Presentation
BibTeX Search WWW PDF   [Stra12]
J. Stratmann
Design and Implementation of a Floating-Point Application Specific Instruction Set Processor
Bachelor Thesis
BibTeX Search WWW PDF   [TBBS12]
S. Tahar and G. Byrd and P. Bose and K. Schneider
International Conference on Computer Design (ICCD)
BibTeX Search WWW PDF   [Thie12]
D. Thielsch
Criteria of Endo/Isochrony in Quartz
Bachelor Thesis
BibTeX Search WWW PDF   [Thie12a]
D. Thielsch
Verifikation auf paralleler Hardware
Presentation
BibTeX Search WWW PDF   [Thie12b]
D. Thielsch
Verifikation auf paralleler Hardware
BibTeX Search WWW   [Thul12]
J. Thull
Ein Testkonzept für Efficient XML Interchange (EXI) im Automobilbereich
Master Thesis
BibTeX Search WWW PDF   [Walk12]
F. Walk
Porting CUDA code to multicore CPUs and other platforms
BibTeX Search WWW PDF   [Walk12a]
F. Walk
Porting CUDA code to multicore CPUs and other platforms
Presentation
BibTeX Search WWW PDF   [Will12a]
S. Willenbrock
Speculative Execution of Data Flow Process Networks
Master Thesis

2011

BibTeX Search WWW PDF   [BGSS11]
J. Brandt and M. Gemünde and K. Schneider and S. Shukla and J.-P. Talpin
Integrating System Descriptions by Clocked Guarded Actions
Forum on Specification and Design Languages (FDL)
BibTeX Search WWW PDF   [BaBS11]
Y. Bai and J. Brandt and K. Schneider
Data-Flow Analysis of Extended Finite State Machines
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [BaBS11a]
Y. Bai and J. Brandt and K. Schneider
SMT-Based Optimization for Synchronous Programs
Software and Compilers for Embedded Systems (SCOPES)
BibTeX Search WWW PDF   [BaBS11b]
D. Baudisch and J. Brandt and K. Schneider
Translating Synchronous Systems to Data-Flow Process Networks
Parallel and Distributed Computing, Applications and Technologies (PDCAT)
BibTeX Search WWW PDF   [BaBS11c]
D. Baudisch and J. Brandt and K. Schneider
Translating Synchronous Systems to Data-Flow Process Networks
Presentation
BibTeX Search WWW PDF   [BaSc11]
K. Bauer and K. Schneider
Transferring Causality Analysis from Synchronous Programs to Hybrid Programs
International Modelica Conference
BibTeX Search WWW PDF   [Blat11]
D. Blatner
Out-of-Order Execution of Data-flow Process Networks for Streaming Applications
Bachelor Thesis
BibTeX Search WWW PDF   [BrSc11]
J. Brandt and K. Schneider
Round Trip to Asynchrony and Synchrony
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BrSc11a]
J. Brandt and K. Schneider
Separate Translation of Synchronous Programs to Guarded Actions
Technical Report
BibTeX Search WWW PDF   [GTBS11]
G. Gaydadjiev and S. Tahar and G. Byrd and K. Schneider
International Conference on Computer Design (ICCD)
BibTeX Search WWW PDF   [GeBS11]
M. Gemünde and J. Brandt and K. Schneider
Schizophrenia and Causality in the Context of Refined Clocks
Forum on Specification and Design Languages (FDL)
BibTeX Search WWW PDF   [GeBS11a]
M. Gemünde and J. Brandt and K. Schneider
Causality Analysis of Synchronous Programs with Refined Clocks
High Level Design Validation and Test Workshop (HLDVT)
BibTeX Search WWW PDF   [HGPB11]
K. Heckemann and M. Gesell and T. Pfister and K. Berns and K. Schneider and M. Trapp
Safe Automotive Software
Knowledge-Based and Intelligent Information and Engineering Systems (KES)
BibTeX Search WWW PDF   [Kolt11]
D. Koltermann
Vektorisierungstechniken zur Nutzung der Multimedia-Extensions
BibTeX Search WWW PDF   [Kolt11a]
D. Koltermann
Vektorisierungstechniken zur Nutzung der Multimedia-Extensions
Presentation
BibTeX Search WWW PDF   [MoSc11]
A. Morgenstern and K. Schneider
Synthesis of Parallel Sorting Networks using SAT Solvers
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [MoSc11a]
A. Morgenstern and K. Schneider
A LTL Fragment for $ GR (1)$-Synthesis
International Workshop on Interactions, Games and Protocols (IWIGP)
BibTeX Search WWW PDF   [MoSc11b]
A. Morgenstern and K. Schneider
Program Sketching via CTL* Model Checking
Model Checking Software (SPIN)
BibTeX Search WWW PDF   [MoSc11e]
A. Morgenstern and K. Schneider
Synthesis of Sorting Networks using SAT Solvers
Presentation
BibTeX Search WWW PDF   [MoSc11f]
A. Morgenstern and K. Schneider
Program Sketching via CTL* Model Checking
Presentation
BibTeX Search WWW PDF   [Nazi11]
R. Nazier
Parallel Programming Models and Hybrid MPI/SMPSs Approach
BibTeX Search WWW PDF   [Nazi11a]
R. Nazier
Parallel Programming Models and Hybrid MPI/SMPSs Approach
Presentation
BibTeX Search WWW PDF   [Senf11]
M. Senftleben
Web-based instruction-level simulation of a parameterized dynamic processor
Bachelor Thesis
BibTeX Search WWW PDF   [Thul11]
J. Thull
Translating OpenMP Programs for Distributed-Memory Systems
BibTeX Search WWW PDF   [Thul11a]
J. Thull
Translating OpenMP Programs for Distributed-Memory Systems
Presentation

2010

BibTeX Search WWW PDF   [BELS10]
A. Benveniste and S.A. Edwards and E. Lee and K. Schneider and R. von Hanxleden
SYNCHRON: Abstracts Collection of Dagstuhl Seminar 09481
BibTeX Search WWW PDF   [BSAS10]
J. Brandt and K. Schneider and S. Ahuja and S.K. Shukla
The Model Checking View to Clock Gating and Operand Isolation
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [BaBS10]
D. Baudisch and J. Brandt and K. Schneider
Multithreaded Code from Synchronous Programs: Extracting Independent Threads for OpenMP
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [BaBS10a]
D. Baudisch and J. Brandt and K. Schneider
Multithreaded Code from Synchronous Programs: Generating Software Pipelines for OpenMP
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BaBS10b]
D. Baudisch and J. Brandt and K. Schneider
Dependency-Driven Distribution of Synchronous Programs
Distributed and Parallel Embedded Systems (DIPES)
BibTeX Search WWW PDF   [BaBS10c]
D. Baudisch and J. Brandt and K. Schneider
Multithreaded Code from Synchronous Programs: Extracting Independent Threads for OpenMP
Presentation
BibTeX Search WWW PDF   [BaBS10d]
D. Baudisch and J. Brandt and K. Schneider
Multithreaded Code from Synchronous Programs: Generating Software Pipelines for OpenMP
Presentation
BibTeX Search WWW PDF   [BaBS10e]
D. Baudisch and J. Brandt and K. Schneider
Dependency-Driven Distribution of Synchronous Programs
Presentation
BibTeX Search WWW PDF   [BaGS10]
K. Bauer and R. Gentilini and K. Schneider
A Uniform Approach to Three-Valued Semantics for mu-Calculus on Abstractions of Hybrid Automata
Software Tools for Technology Transfer (STTT)
BibTeX Search WWW PDF   [BaSc10]
K. Bauer and K. Schneider
From synchronous programs to symbolic representations of hybrid systems
Hybrid Systems: Computation and Control (HSCC)
BibTeX Search WWW PDF   [BaSc10a]
K. Bauer and K. Schneider
Predicting Events for the Simulation of Hybrid Systems
International Conference on Computer and Information Technology (CIT)
BibTeX Search WWW PDF   [Bai10]
Y. Bai
Dependency Analysis of Synchronous Programming Languages
Master Thesis
BibTeX Search WWW PDF   [BrGS10]
J. Brandt and M. Gemünde and K. Schneider
From Synchronous Guarded Actions to SystemC
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BrSS10]
J. Brandt and K. Schneider and S.K. Shukla
Translating concurrent action oriented specifications to synchronous guarded actions
Languages, Compilers, and Tools for Embedded Systems (LCTES)
BibTeX Search WWW PDF   [GeBS10]
M. Gemünde and J. Brandt and K. Schneider
Clock Refinement in Imperative Synchronous Languages
SYNCHRON'09: Abstracts Collection of Dagstuhl Seminar 09481
BibTeX Search WWW PDF   [GeBS10a]
M. Gemünde and J. Brandt and K. Schneider
A Formal Semantics of Clock Refinement in Imperative Synchronous Languages
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [GeBS10b]
M. Gemünde and J. Brandt and K. Schneider
Compilation of Imperative Synchronous Programs with Refined Clocks
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [MoSc10]
A. Morgenstern and K. Schneider
Exploiting the Temporal Logic Hierarchy and the Non-Confluence Property for Efficient LTL Synthesis
Games, Automata, Logics, and Formal Verification (GandALF)
BibTeX Search WWW PDF   [MoSc10a]
A. Morgenstern and K. Schneider
Exploiting the Temporal Logic Hierarchy and the Non-Confluence Property for Efficient LTL Synthesis
Presentation
BibTeX Search WWW PDF   [Morg10]
A. Morgenstern
Symbolic Controller Synthesis for LTL Specifications
PhD Thesis
BibTeX Search WWW PDF   [Rope10]
T. Ropertz
Efficient Execution of Synchronous Guarded Actions using CUDA
Bachelor Thesis
BibTeX Search WWW PDF   [SJCB10]
K. Schneider and B. Jobstmann and L. Carloni and J. Brandt
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Will10]
A. Willenbücher
Optimizing Combinational Circuits for FPGAs Using Genetic Programming
Master Thesis

2009

BibTeX Search WWW PDF   [BaGS09]
D. Baudisch and M. Gesell and K. Schneider
Online Exercise System -- A Web-Based Tool for Administration and Automatic Correction of Exercises
Computer Supported Education (CSEDU)
BibTeX Search WWW PDF   [BaGS09a]
K. Bauer and R. Gentilini and K. Schneider
Property Driven Three-Valued Model Checking on Hybrid Automata
Workshop on Logic, Language, Information and Computation (WoLLIC)
BibTeX Search WWW PDF   [BaGS09b]
K. Bauer and R. Gentilini and K. Schneider
A Uniform Approach to Three-Valued Semantics for mu-Calculus on Abstractions of Hybrid Automata
Haifa Verification Conference (HVC)
BibTeX Search WWW PDF   [BaGS09c]
D. Baudisch and M. Gesell and K. Schneider
Online Exercise System -- A Web-Based Tool for Administration and Automatic Correction of Exercises
Presentation
BibTeX Search WWW PDF   [BrGS09]
J. Brandt and M. Gemünde and K. Schneider
Desynchronizing Synchronous Programs by Modes
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [BrSW09]
J. Brandt and K. Schneider and A. Willenbücher
Using IP Cores in Synchronous Languages
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BrSc09]
J. Brandt and K. Schneider
Separate Compilation for Synchronous Programs
Software and Compilers for Embedded Systems (SCOPES)
BibTeX Search WWW PDF   [BrSc09a]
J. Brandt and K. Schneider
Static Data-Flow Analysis of Synchronous Programs
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Schn09]
K. Schneider
The Synchronous Programming Language Quartz
Technical Report
BibTeX Search WWW PDF   [VeTS09]
E. Vecchié and J.-P. Talpin and K. Schneider
Separate Compilation and Execution of Imperative Synchronous Modules
Design, Automation and Test in Europe (DATE)

2008

BibTeX Search WWW PDF   [BaGS08]
K. Bauer and R. Gentilini and K. Schneider
Approximated Reachability on Hybrid Automata: Falsification meets Certification
Electronic Notes in Theoretical Computer Science (ENTCS)
BibTeX Search WWW PDF   [Baud08]
D. Baudisch
Synthesis for VLIW Architectures
Diploma Thesis
BibTeX Search WWW PDF   [Baue08b]
K. Bauer
Algebraic Methods and Abstractions for Automated 3-valued Reasoning on Hybrid Automata
Diploma Thesis
BibTeX Search WWW PDF   [BrSW08]
J. Brandt and K. Schneider and A. Willenbücher
Hardware Acceleration for Model Checking
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [BrSc08]
J. Brandt and K. Schneider
Embedded Systems: Status and Perspective
BibTeX Search WWW PDF   [BrSc08a]
J. Brandt and K. Schneider
Formal Reasoning About Causality Analysis
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [DyWi08]
S. Dyckmans and A. Willenbücher
Design and Implementation of a Dataflow-Processor for Synchronous Programs
Bachelor Thesis
BibTeX Search WWW PDF   [EdSc08]
S. Edwards and K. Schneider
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [Gemu08]
M. Gemünde
Evaluation Environment for AUTOSAR-Autocode in Motor Control Units
Diploma Thesis
BibTeX Search WWW PDF   [Gese08]
M. Gesell
Probabilistic Model Checking of Synchronous Programs
Diploma Thesis
BibTeX Search WWW PDF   [MoSL08]
A. Morgenstern and K. Schneider and S. Lamberti
Generating Deterministic $\omega$-Automata for most LTL Formulas by the Breakpoint Construction
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [MoSL08b]
A. Morgenstern and K. Schneider and S. Lamberti
Generating Deterministic ω-Automata for most LTL formulas by the Breakpoint Construction
Presentation
BibTeX Search WWW PDF   [MoSc08]
A. Morgenstern and K. Schneider
From LTL to Symbolically Represented Deterministic Automata
Verification, Model Checking, and Abstract Interpretation (VMCAI)
BibTeX Search WWW PDF   [MoSc08c]
A. Morgenstern and K. Schneider
From LTL to Symbolically Represented Deterministic Automata
Presentation
BibTeX Search WWW PDF   [PoSc08]
A. Poetzsch-Heffter and K. Schneider
Workshop on Verification of Adaptive Systems (VerAS)
Electronic Notes in Theoretical Computer Science (ENTCS)
BibTeX Search WWW PDF   [ScBr08]
K. Schneider and J. Brandt
Performing Causality Analysis by Bounded Model Checking
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [Schm08]
S. Schmitt
Supervisor Synthesis using SAT-Solvers
Diploma Thesis

2007

BibTeX Search WWW PDF   [Baue07]
K. Bauer
On the Use of Gröbner Bases and Algebraic Methods for the Analysis of Hybrid Automata
Project Thesis
BibTeX Search WWW PDF   [Baue07a]
K. Bauer
Three-valued $\mu$-Calculus on Hybrid Automata
Diploma Thesis
BibTeX Search WWW PDF   [BrSc07]
J. Brandt and K. Schneider
Different Kinds of System Descriptions as Synchronous Programs
BibTeX Search WWW PDF   [BrSc07b]
J. Brandt and K. Schneider
How Different are Esterel and SystemC?
Forum on Specification and Design Languages (FDL)
BibTeX Search WWW PDF   [Bran07]
J. Brandt
A Layered Approach to Polygon Processing for Safety-Critical Embedded Systems
PhD Thesis
BibTeX Search WWW PDF   [GeGe07]
M. Gesell and M. Gemünde
Eine Oberfläche zur Simulation synchroner Sprachen
Project Thesis
BibTeX Search WWW PDF   [GeSD07a]
R. Gentilini and K. Schneider and A. Dreyer
Combining Interval Arithmetic and Three-Valued Temporal Logics for the Verification of Analog Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [GeSD07b]
R. Gentilini and K. Schneider and A. Dreyer
Three-Valued Automated Reasoning on Analog Properties
Great Lakes Symposium on VLSI (GLSVLSI)
BibTeX Search WWW PDF   [GeSM07]
R. Gentilini and K. Schneider and B. Mishra
Successive Abstractions of Hybrid Automata for Monotonic CTL Model Checking
Logical Foundations of Computer Science (LFCS)
BibTeX Search WWW PDF   [HoSc07]
J.C. Hoe and K. Schneider
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [MoSc07]
A. Morgenstern and K. Schneider
Synthesizing Deterministic Controllers in Supervisory Control
Informatics in Control, Automation and Robotics (ICINCO)
BibTeX Search WWW PDF   [PBSS07]
M. Proetzsch and K. Berns and T. Schüle and K. Schneider
Formal Verification of Safety Behaviours of the Outdoor Robot RAVON
Informatics in Control, Automation and Robotics (ICINCO)
BibTeX Search WWW PDF   [PoSc07]
A. Poetzsch-Heffter and K. Schneider
First DASMOD Workshop on Verification of Adaptive Systems (VerAS)
Technical Report
BibTeX Search WWW PDF   [ScBr07]
K. Schneider and J. Brandt
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScBr07a]
K. Schneider and J. Brandt
Theorem Proving in Higher Order Logics and Applications -- Emerging Trends
Technical Report
BibTeX Search WWW PDF   [ScSc07]
T. Schüle and K. Schneider
Verification of Data Paths Using Unbounded Integers: Automata Strike Back
Haifa Verification Conference (HVC)
BibTeX Search WWW PDF   [ScSc07a]
T. Schüle and K. Schneider
Bounded Model Checking of Infinite State Systems
Formal Methods in System Design (FMSD)
BibTeX Search WWW PDF   [Schu07]
T. Schüle
Verification of Infinite State Systems Using Presburger Arithmetic
PhD Thesis
BibTeX Search WWW PDF   [TuSG07]
T. Türk and K. Schneider and M. Gordon
Model Checking PSL Using HOL and SMV
Haifa Verification Conference (HVC)

2006

BibTeX Search WWW PDF   [Baud06]
D. Baudisch
Implementierung und Verifikation eines RISC-Prozessors in Averest
Project Thesis
BibTeX Search WWW PDF   [BrSc06]
J. Brandt and K. Schneider
Multimedia-Hardwareerweiterungen
BibTeX Search WWW PDF   [BrSc06a]
J. Brandt and K. Schneider
System Description Aspects as Syntactic Sugar
Forum on Specification and Design Languages (FDL)
BibTeX Search WWW PDF   [BrSc06b]
J. Brandt and K. Schneider
Efficient Map Overlay for Safety-Critical Embedded Systems
Industrial Embedded Systems (IES)
BibTeX Search WWW PDF   [Frie06]
M. Friedrich
Design and Implementation of a FCC Schedule Planner for an unmanned aircraft demonstrator
Diploma Thesis
BibTeX Search WWW PDF   [ScBS06]
K. Schneider and J. Brandt and T. Schüle
A Verified Compiler for Synchronous Programs with Local Declarations
Electronic Notes in Theoretical Computer Science (ENTCS)
BibTeX Search WWW PDF   [ScBV06a]
K. Schneider and J. Brandt and E. Vecchié
Modular Compilation of Synchronous Programs
Distributed and Parallel Embedded Systems (DIPES)
BibTeX Search WWW PDF   [ScBV06b]
K. Schneider and J. Brandt and E. Vecchié
Efficient Code Generation from Synchronous Programs
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [ScST06]
K. Schneider and T. Schüle and M. Trapp
Verifying the Adaptation Behavior of Embedded Systems
Software Engineering for Adaptive and Self-Managing Systems (SEAMS)
BibTeX Search WWW PDF   [ScSc06a]
K. Schneider and T. Schüle
A Framework for Verifying and Implementing Embedded Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [Schn06a]
K. Schneider
Book Review: `A Practical Theory of Reactive Systems'
The Computer Journal
BibTeX Search WWW PDF   [Wagn06]
C. Wagner
Automatenbasierte Entscheidungsverfahren für Presburger-Arithmetik
Diploma Thesis

2005

BibTeX Search WWW PDF   [BrSc05]
J. Brandt and K. Schneider
Using Three-Valued Logic to Specify and Verify Algorithms of Computational Geometry
International Conference on Formal Engineering Methods (ICFEM)
BibTeX Search WWW PDF   [BrSc05a]
J. Brandt and K. Schneider
Dependable Polygon-Processing Algorithms for Safety-Critical Embedded Systems
Embedded and Ubiquitous Computing (EUC)
BibTeX Search WWW   [Cron05]
B. Cronauer
XML-basierte Konfiguration von Steuergeräten
Diploma Thesis
BibTeX Search WWW PDF   [MoSc05]
A. Morgenstern and K. Schneider
A Unified Model Checking Framework for the Supervisor Synthesis Problem
Games for Logic and Programming Languages
BibTeX Search WWW PDF   [MoSc05a]
A. Morgenstern and K. Schneider
Synthesizing Deterministic Controllers in Supervisory Control
Informatics in Control, Automation and Robotics (ICINCO)
BibTeX Search WWW PDF   [MoSc05b]
A. Morgenstern and K. Schneider
Using Model Checking to Solve Supervisor Synthesis Problems
Conference on Decision and Control and European Control Conference (CDC/ECC)
BibTeX Search WWW PDF   [MoSc05c]
A. Morgenstern and K. Schneider
Using Model Checking to Solve Supervisor Synthesis Problems
Presentation
BibTeX Search WWW PDF   [MoSc05d]
A. Morgenstern and K. Schneider
Synthesizing Deterministic Controllers in Supervisory Control
Presentation
BibTeX Search WWW PDF   [SBST05a]
K. Schneider and J. Brandt and T. Schüle and T. Türk
Improving Constructiveness in Code Generators
Synchronous Languages, Applications, and Programming (SLAP)
BibTeX Search WWW PDF   [SBST05b]
K. Schneider and J. Brandt and T. Schüle and T. Türk
Maximal Causality Analysis
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [ScSc05]
T. Schüle and K. Schneider
Three-Valued Logic in Bounded Model Checking
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [ScSc05a]
K. Schneider and T. Schüle
Averest: Specification, Verification, and Implementation of Reactive Systems
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [Schm05]
M. Schmidt
An Algorithm for Restriction of Finite Automata
Diploma Thesis
BibTeX Search WWW PDF   [TuSc05]
T. Türk and K. Schneider
From PSL to LTL: A Formal Validation in HOL
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [TuSc05a]
T. Türk and K. Schneider
Relationship between Alternating omega-Automata and Symbolically Represented Nondeterministic omega-Automata
Technical Report
BibTeX Search WWW PDF   [Tuer05]
T. Türk
A Hierarchy for Accellera's Property Specification Language
Diploma Thesis
BibTeX Search WWW PDF   [Wagn05a]
C. Wagner
Evaluierung von Algorithmen zur Berechnung fairer Pfade
Project Thesis
BibTeX Search WWW PDF   [ZiSc05]
R. Ziller and K. Schneider
Combining Supervisor Synthesis and Model Checking
ACM Transactions on Embedded Computing Systems (TECS)

2004

BibTeX Search WWW PDF   [BuKS04]
W. Büttner and W. Kunz and K. Schneider
Verifikation reaktiver Systeme
BibTeX Search WWW   [Cron04]
B. Cronauer
Entwicklung eines embedded SPFH-Signal-Simulators für das John Deere GreenStar Office System
BibTeX Search WWW PDF   [Gent04]
R. Gentilini
Graph Algorithms for Massive Data-Sets
PhD Thesis
BibTeX Search WWW PDF   [Ober04]
A. Obermann
Verifikation kryptographischer Protokolle mit Baumtransduktoren
Diploma Thesis
BibTeX Search WWW PDF   [ScBS04a]
K. Schneider and J. Brandt and T. Schüle
A Verified Compiler for Synchronous Programs with Local Declarations (proceedings version)
Synchronous Languages, Applications, and Programming (SLAP)
BibTeX Search WWW PDF   [ScBS04b]
K. Schneider and J. Brandt and T. Schüle
Causality Analysis of Synchronous Programs with Delayed Actions
Compilers, Architecture, and Synthesis for Embedded Systems (CASES)
BibTeX Search WWW PDF   [ScSc04]
T. Schüle and K. Schneider
Global vs. Local Model Checking of Infinite State Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [ScSc04a]
T. Schüle and K. Schneider
Abstraction of Assembler Programs for Symbolic Worst Case Execution Time Analysis
Design Automation Conference (DAC)
BibTeX Search WWW PDF   [ScSc04b]
T. Schüle and K. Schneider
Bounded Model Checking of Infinite State Systems: Exploiting the Automata Hierarchy
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [ScSc04c]
T. Schüle and K. Schneider
Global vs. Local Model Checking: A Comparison of Verification Techniques for Infinite State Systems
Software Engineering and Formal Methods (SEFM)
BibTeX Search WWW PDF   [Webe04]
J. Weber
Entwurf eines RISC Prozessors mit synchronen Sprachen
Diploma Thesis

2003

BibTeX Search WWW PDF   [Bran03]
J. Brandt
2D-Polygon-Clipping Algorithmen für eingebettete Echtzeitsysteme
Diploma Thesis
BibTeX Search WWW PDF   [LoSM03a]
G. Logothetis and K. Schneider and C. Metzler
Exact Low-Level Runtime Analysis of Synchronous Programs for Formal Verification of Real-Time Systems
Forum on Specification and Design Languages (FDL)
BibTeX Search WWW PDF   [LoSM03b]
G. Logothetis and K. Schneider and C. Metzler
Runtime Analysis of Synchronous Programs for Low-Level Real-Time Verification
Symposium on Integrated Circuits and System Design (SBCCI)
BibTeX Search WWW PDF   [LoSM03c]
G. Logothetis and K. Schneider and C. Metzler
Generating Formal Models for Real-Time Verification by Exact Low-Level Runtime Analysis of Synchronous Programs
Real-Time Systems Symposium (RTSS)
BibTeX Search WWW PDF   [LoSc03]
G. Logothetis and K. Schneider
Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW   [Metz03]
C. Metzler
WCET-Analyse mit symbolischen Verfahren
Diploma Thesis
BibTeX Search WWW PDF   [ScSc03]
T. Schüle and K. Schneider
Exact Runtime Analysis Using Automata-Based Symbolic Simulation
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW   [Schn03]
K. Schneider
Verification of Reactive Systems -- Formal Methods and Algorithms
Springer
BibTeX Search WWW PDF   [ZiSc03a]
R.M. Ziller and K. Schneider
A $\mu$-Calculus Approach to Supervisor Synthesis
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [ZiSc03b]
R. Ziller and K. Schneider
A Generalized Approach to Supervisor Synthesis
Formal Methods and Models for Codesign (MEMOCODE)
BibTeX Search WWW PDF   [ZiSc03c]
R. Ziller and K. Schneider
Reducing Complexity of Supervisor Synthesis
Control Systems Design (CSD)

2002

BibTeX Search WWW PDF   [BaSc02]
M. Baldamus and K. Schneider
The BDD Space Complexity of Different Forms of Concurrency
Fundamenta Informaticae
BibTeX Search WWW PDF   [LoSc02]
G. Logothetis and K. Schneider
Extending Synchronous Languages for Generating Abstract Real-Time Models
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [ScSc02]
T. Schüle and K. Schneider
Symbolic Model Checking by Automata Based Set Representation
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [Schn02]
K. Schneider
Proving the Equivalence of Microstep and Macrostep Semantics
Theorem Proving in Higher Order Logics (TPHOL)

2001

BibTeX Search WWW PDF   [BSWZ01]
M. Baldamus and K. Schneider and M. Wenz and R. Ziller
Can American Checkers be Solved by Means of Symbolic Model Checking?
Electronic Notes in Theoretical Computer Science (ENTCS)
BibTeX Search WWW PDF   [BaSc01]
M. Baldamus and K. Schneider
The BDD Space Complexity of Different Forms of Concurrency
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [HHKK01]
D.W. Hoffmann and L. Holt and E. Klein and T. Kropf and K. Schneider
Special Issue on the PROSPER project
BibTeX Search WWW PDF   [LoSc01]
G. Logothetis and K. Schneider
A New Approach to the Specification and Verification of Real-Time Systems
Euromicro Conference on Real-Time Systems (ECRTS)
BibTeX Search WWW PDF   [LoSc01a]
G. Logothetis and K. Schneider
Symbolic model checking of real-time systems
Temporal Representation and Reasoning (TIME)
BibTeX Search WWW PDF   [Muel01]
A. Müller
Entwurf und Realisierung eines eingebetteten Systems zur Steuerung eines automatisierten Kalibrierkanals für Strömungssonden
Project Thesis
BibTeX Search WWW PDF   [ScWe01]
K. Schneider and M. Wenz
A new method for compiling schizophrenic synchronous programs
Compilers, Architecture, and Synthesis for Embedded Systems (CASES)
BibTeX Search WWW   [Schn01]
K. Schneider
Exploiting Hierarchies in Temporal Logics, Finite Automata, Arithmetics, and $\mu$-Calculus for Efficiently Verifying Reactive Systems
Habilitation Thesis
BibTeX Search WWW PDF   [Schn01a]
K. Schneider
Embedding Imperative Synchronous Languages in Interactive Theorem Provers
Application of Concurrency to System Design (ACSD)
BibTeX Search WWW PDF   [Schn01b]
K. Schneider
Improving Automata Generation for Linear Temporal Logic by Considering the Automata Hierarchy
Logic for Programming, Artificial Intelligence, and Reasoning (LPAR)
BibTeX Search WWW PDF   [Wenz01]
M. Wenz
Codeerzeugung für die synchrone Modellierungssprache Quartz
Diploma Thesis

2000

BibTeX Search WWW PDF   [BSWZ00]
M. Baldamus and K. Schneider and M. Wenz and R. Ziller
Can American Checkers be Solved by Means of Symbolic Model Checking?
Formal Methods Elsewhere
BibTeX Search WWW PDF   [LoSc00]
G. Logothetis and K. Schneider
Abstraction from Counters: An Application on Real-Time Systems
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [Schn00]
K. Schneider
A Verified Hardware Synthesis for Esterel
Distributed and Parallel Embedded Systems (DIPES)

1999

BibTeX Search WWW PDF   [BaSc99]
M. Baldamus and K. Schneider
Extending Esterel by Asynchronous Concurrency
Fachtagung zum Entwurf Integrierter Schaltungen
BibTeX Search WWW PDF   [HSKL99]
M. Huhn and K. Schneider and T. Kropf and G. Logothetis
Verifying Imprecisely Working Arithmetic Circuits
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [SSHL99]
D. Schmid and K. Schneider and M. Huhn and G. Logothetis and V. Sabelfeld
Formale Verifikation eingebetteter Systeme
Informationstechnik und Technische Informatik (it+ti)
BibTeX Search WWW PDF   [ScHL99]
K. Schneider and M. Huhn and G. Logothetis
Validation of Object Oriented Concurrent Designs by Model Checking
Correct Hardware Design and Verification Methods (CHARME)
BibTeX Search WWW PDF   [ScHL99a]
K. Schneider and M. Huhn and G. Logothetis
Validation of Object Oriented Concurrent Designs by Model Checking
BibTeX Search WWW PDF   [ScHo99]
K. Schneider and D.W. Hoffmann
A HOL Conversion for Translating Linear Time Temporal Logic to omega-Automata
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScHu99]
K. Schneider and M. Huhn
Comparing Model-Checking and Term-Rewriting in the Verification of an Embedded System
Distributed and Parallel Embedded Systems (DIPES)
BibTeX Search WWW PDF   [ScLo99]
K. Schneider and G. Logothetis
Abstraction of Systems with Counters for Symbolic Model Checking
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [ScSa99]
K. Schneider and V. Sabelfeld
Introducing Mutual Exclusion in Esterel
Andrei Ershov Third International Conference Perspectives of Systems Informatics
BibTeX Search WWW PDF   [Schn99]
K. Schneider
Yet Another Look at LTL Model Checking
Correct Hardware Design and Verification Methods (CHARME)
BibTeX Search WWW PDF   [StSH99]
T. Stauner and K. Schneider and M. Huhn
Translating a Visual Description Technique to a Synchronous Language: From DiCharts to PURR
Formale Beschreibungstechniken für verteilte Systeme
BibTeX Search WWW   [Stit99]
P. Stitzelberger
übersetzung von VHDL-Strukturbeschreibungen in die synchrone Beschreibungssprache PURR
Diploma Thesis
BibTeX Search WWW PDF   [Zimm99]
J. Zimmermann
Implementierung eines Entwurfs-und Verifikationswerkzeuges für die synchrone Programmiersprache PURR
Master Thesis

1998

BibTeX Search WWW PDF   [GrSc98]
W. Grünewald and K. Schneider
Modeling and Verifying Abstract Multithreaded Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [KRSW98]
T. Kropf and J. Ruf and K. Schneider and M. Wild
A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [KRSW98a]
T. Kropf and J. Ruf and K. Schneider and M. Wild
The Synchronous System Description Language PURR
System Design Automation
BibTeX Search WWW PDF   [ReSK98]
R. Reetz and K. Schneider and T. Kropf
Formal Specification in VHDL for Formal Hardware Verification
Design, Automation and Test in Europe (DATE)
BibTeX Search WWW PDF   [SSFS98]
I. Schreiber and J. Schönherr and E. Fordran and K. Schneider and B. Straube
Kontrollfluss-Verifikation von Algorithmen mittels Modellprüfung
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV)
BibTeX Search WWW PDF   [Schn98]
K. Schneider
Model Checking on Product Structures
Formal Methods in Computer-Aided Design (FMCAD)
BibTeX Search WWW PDF   [Schr98]
J. Schröder-Babo
Anwendung spezieller Modellprüfungstechniken bei der Verifikation einer mehrfähdigen Prozessorarchitektur
Project Thesis
BibTeX Search WWW PDF   [Zimm98]
J. Zimmermann
Verifikation der diskreten Cosinus-Transformation mittels Modellprüfung
Project Thesis

1997

BibTeX Search WWW PDF   [Kuec97]
G. Küçük
Eine synchrone generische Hardwarebeschreibungssprache für die Verifikation mit induktiven Verfahren sowie Modellierung temporaler Logik
Diploma Thesis
BibTeX Search WWW PDF   [ReSK97a]
R. Reetz and K. Schneider and T. Kropf
Formale Spezifikation und Verifikation mit VHDL
Hardwarebeschreibungssprachen und Modellierungsparadigmen
BibTeX Search WWW PDF   [ReSK97b]
R. Reetz and K. Schneider and T. Kropf
Ein neues Konzept zur formalen Spezifikation in VHDL mit einer Fallstudie zum Single Pulser
Methoden des Entwurfs und der Verifikation digitaler Systeme
BibTeX Search WWW PDF   [ScKr97a]
K. Schneider and T. Kropf
The C@S System: Combining Proof Strategies for System Verification
BibTeX Search WWW PDF   [ScWe97]
K. Schneider and H. Weindel
An Efficient Decision Procedure for S1S
Methoden des Entwurfs und der Verifikation digitaler Systemen (GI/ITG/GMM Workshop)
BibTeX Search WWW PDF   [Schn97b]
K. Schneider
Translating LTL to Deterministic Omega-Automata
Methoden des Entwurfs und der Verifikation digitaler Systemen (GI/ITG/GMM Workshop)
BibTeX Search WWW PDF   [Wein97]
H. Weindel
Verifikation von Zeitbedingungen mittels arithmetischer Entscheidungsverfahren
Diploma Thesis

1996

BibTeX Search WWW PDF   [Amor96]
M.G. Ben Amor
Implementierung eines Modellprüfers für die verzweigende temporale Logik CTL*
Diploma Thesis
BibTeX Search WWW PDF   [FrKS96]
J. Frößl and T. Kropf and K. Schneider
Bewertung temporaler Logiken für die Hardware-Verifikation
Methoden des Entwurfs und der Verifikation digitaler Systeme (GI/ITG/GME Workshop)
BibTeX Search WWW PDF   [ScKr96b]
K. Schneider and T. Kropf
A Unified Approach for Combining Different Formalisms for Hardware Verification
Methoden des Entwurfs und der Verifikation digitaler Systeme (GI/ITG/GME Workshop)
BibTeX Search WWW PDF   [ScKr96c]
K. Schneider and T. Kropf
A Unified Approach for Combining Different Formalisms for Hardware Verification
Formal Methods in Computer-Aided Design (FMCAD)
BibTeX Search WWW PDF   [Schn96a]
K. Schneider
Ein einheitlicher Ansatz zur Unterstützung von Abstraktionsmechanismen der Hardwareverifikation
Infix

1995

BibTeX Search WWW PDF   [Garb95]
R.-U. Garbe
Implementierung eines hierarchischen Verifikationsverfahrens mit $\omega$-Automaten
Project Thesis
BibTeX Search WWW PDF   [KrSK95]
T. Kropf and K. Schneider and R. Kumar
A Formal Framework for High Level Synthesis
Theorem Provers in Circuit Design (TPCD)
BibTeX Search WWW PDF   [ScKT95b]
K. Schneider and T. Kropf and T. Thiessenhusen
Spezifikation und Verifikation systolischer Felder mit Logik höherer Ordnung
Anwendung formaler Methoden beim Entwurf von Hardwaresystemen
BibTeX Search WWW PDF   [Schn95c]
K. Schneider
Ein automatentheoretischer Ansatz zur Strukturabstraktion für die hierarchische Verifikation
Anwendung formaler Methoden beim Entwurf von Hardwaresystemen

1994

BibTeX Search WWW PDF   [EiSK94]
D. Eisenbiegler and K. Schneider and R. Kumar
A Functional Approach for Formalizing Regular Hardware Structures
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [PoSc94]
J. Posegga and K. Schneider
A First-Order Calculus Based on Propositional BDDs
Anwendung formaler Methoden im Systementwurf
BibTeX Search WWW   [SSSK94]
A. Schneider and B. Straube and K. Schneider and T. Kropf
Verifikation eines digitalen Netzwerkes mit Hilfe des Beweissystems HOL
Technical Report
BibTeX Search WWW PDF   [ScKK94]
K. Schneider and R. Kumar and T. Kropf
Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK94a]
K. Schneider and T. Kropf and R. Kumar
Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path
European Design Automation Conference (EDAC)
BibTeX Search WWW PDF   [ScKK94b]
K. Schneider and T. Kropf and R. Kumar
Accelerating Tableaux Proofs using Compact Representations
Formal Methods in System Design (FMSD)
BibTeX Search WWW PDF   [ScKK94c]
K. Schneider and T. Kropf and R. Kumar
Why Hardware Verification Needs more than Model Checking
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK94d]
K. Schneider and R. Kumar and T. Kropf
Automating Verification by Functional Abstraction at the System Level
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK94e]
K. Schneider and R. Kumar and T. Kropf
Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK94h]
K. Schneider and T. Kropf and R. Kumar
Hardware-Verifikation braucht mehr als Model-Checking
Anwendung formaler Methoden im Systementwurf

1993

BibTeX Search WWW PDF   [Eise93]
D. Eisenbiegler
Ein funktionaler Ansatz zur systematischen Formalisierung regulärer Schaltungen
Diploma Thesis
BibTeX Search WWW PDF   [KrKS93a]
T. Kropf and R. Kumar and K. Schneider
Embedding Hardware Verification within a Commercial Design Framework
Correct Hardware Design and Verification Methods (CHARME)
BibTeX Search WWW PDF   [KuSK93a]
R. Kumar and K. Schneider and T. Kropf
Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment
Formal Methods in System Design (FMSD)
BibTeX Search WWW PDF   [PoSc93]
J. Posegga and K. Schneider
Deduction with First-Order BDDs
Theorem Proving with Analytic Tableaux and Related Methods (TABLEAUX)
BibTeX Search WWW PDF   [ScKK93a]
K. Schneider and R. Kumar and T. Kropf
Hardware-Verification using First Order BDDs
Computer Hardware Description Languages and Their Applications (CHDL)
BibTeX Search WWW PDF   [ScKK93e]
K. Schneider and T. Kropf and R. Kumar
Kontrollpfad-orientierte Verifikation generischer Datenpfade
Entwurf integrierter Schaltungen (EIS)
BibTeX Search WWW PDF   [ScRS93]
D. Schmid and R. Reetz and K. Schneider
Ein Praktikum zur Hardware-Verifikation
Entwurf integrierter Schaltungen (EIS)

1992

BibTeX Search WWW PDF   [ScKK92]
K. Schneider and R. Kumar and T. Kropf
Automating most Parts of Hardware Proofs in HOL
Computer Aided Verification (CAV)
BibTeX Search WWW PDF   [ScKK92a]
K. Schneider and R. Kumar and T. Kropf
The FAUST Prover
Conference on Automated Deduction (CADE)
BibTeX Search WWW PDF   [ScKK92b]
K. Schneider and R. Kumar and T. Kropf
Efficient Representation and Computation of Tableau Proofs
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK92c]
K. Schneider and R. Kumar and T. Kropf
Modelling generic Hardware Structures by Abstract Datatypes
Theorem Proving in Higher Order Logics (TPHOL)

1991

BibTeX Search WWW PDF   [KuKS91a]
R. Kumar and T. Kropf and K. Schneider
Integrating a First-Order Automatic Prover in the HOL Environment
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [KuKS91b]
R. Kumar and T. Kropf and K. Schneider
First Steps Towards Automating Hardware Proofs in HOL
Theorem Proving in Higher Order Logics (TPHOL)
BibTeX Search WWW PDF   [ScKK91a]
K. Schneider and R. Kumar and T. Kropf
Structuring Hardware Proofs: First steps towards Automation in a Higher-Order Environment
Very Large Scale Integration (VLSI)
BibTeX Search WWW PDF   [Schn91]
K. Schneider
Ein Sequenzenkalkül für HOL
Master Thesis