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[Baud08] D. Baudisch Synthesis for VLIW Architectures Master Thesis |
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[Baue08b] K. Bauer Algebraic Methods and Abstractions for Automated 3-valued Reasoning on Hybrid Automata Master Thesis |
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[DyWi08] S. Dyckmans and A. Willenbücher Design and Implementation of a Dataflow-Processor for Synchronous Programs Master Thesis |
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[Gemu08] M. Gemünde Evaluation Environment for AUTOSAR-Autocode in Motor Control Units Master Thesis |
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[Gese08] M. Gesell Probabilistic Model Checking of Synchronous Programs Master Thesis |
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[PoSc08] A. Poetzsch-Heffter and K. Schneider Workshop on Verification of Adaptive Systems (VerAS) |
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[Schm08] S. Schmitt Supervisor Synthesis using SAT-Solvers Master Thesis |
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[Baue07] K. Bauer On the Use of Gröbner Bases and Algebraic Methods for the Analysis of Hybrid Automata Master Thesis |
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[Baue07a] K. Bauer Three-valued µ-Calculus on Hybrid Automata Master Thesis |
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[Bran07] J. Brandt A Layered Approach to Polygon Processing for Safety-Critical Embedded Systems PhD Thesis |
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[GeGe07] M. Gesell and M. Gemünde Eine Oberfläche zur Simulation synchroner Sprachen Master Thesis |
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[HoSc07] J.C. Hoe and K. Schneider International Conference on Formal Methods and Models for Co-Design (MEMOCODE) |
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[ScBr07] K. Schneider and J. Brandt International Conference on Theorem Proving in Higher Order Logics (TPHOL) |
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[ScBr07a] K. Schneider and J. Brandt Theorem Proving in Higher Order Logics and Applications - Emerging Trends Technical Report |
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[Schu07] T. Schuele Verification of Infinite State Systems Using Presburger Arithmetic PhD Thesis |
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[Baud06] D. Baudisch Implementierung und Verifikation eines RISC-Prozessors in Averest Master Thesis |
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[BrSc06] J. Brandt and K. Schneider Multimedia-Hardwareerweiterungen |
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[Frie06] M. Friedrich Design and Implementation of a FCC Schedule Planner for an unmanned aircraft demonstrator Master Thesis |
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[Wagn06] C. Wagner Automatenbasierte Entscheidungsverfahren für Presburger-Arithmetik Master Thesis |
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[Cron05] B. Cronauer XML-basierte Konfiguration von Steuergeräten Master Thesis |
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[Schm05] M. Schmidt An Algorithm for Restriction of Finite Automata Master Thesis |
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[Tuer05] T. Tuerk A Hierarchy for Accellera's Property Specification Language Master Thesis |
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[Wagn05a] C. Wagner Evaluierung von Algorithmen zur Berechnung fairer Pfade Master Thesis |
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[Cron04] B. Cronauer Entwicklung eines embedded SPFH-Signal-Simulators für das JohnDeere GreenStar Office System |
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[Gent04] R. Gentilini Graph Algorithms for Massive Data-Sets PhD Thesis |
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[Ober04] A. Obermann Verifikation kryptographischer Protokolle mit Baumtransduktoren Master Thesis |
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[Webe04] J. Weber Entwurf eines RISC Prozessors mit synchronen Sprachen Master Thesis |
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[Bran03] J. Brandt 2D-Polygon-Clipping Algorithmen für eingebettete Echtzeitsysteme Master Thesis |
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